Validating processes, start/stop layer for through holes
It would be good to have some basic validation on processes (drilling, milling, etc).
Looking at the specification, holes can be either blind, buried, through back drill or via.
A simple validation to implement would be to check that through holes and vias end on an outer conductive layer. How should this be implemented for single and zero sided boards?
One option could be to require zero sided boards to be single sided boards with all copper removed and have start/end layer be the same copper layer.
We could also disregard this check for through holes, the information seems redundant. If so, should we disallow this information in the spec?
I might be wrong here, but wouldn't this be solved by having both start and stop layer for the hole to be the same layer? I'm not into zero-sided boards, but they are just a piece of dielectric or other material right? If you want to have holes in them, nothing is preventing you to use this dielectric layer as both start and stop, right?
From my point of view we should not think only conductive layers but any layer. This means we still need to define which layer is a start and stop of any hole. And, with one layer only (which means no copper layers) the hole will be NPTH and same layer is both start and stop. With single sided PCBs (1 copper layer) the hole will start at the conductive layer, and stop at at dielectric layer. For a blind hole, the stop layer is then not the bottom layer. I am then not counting layers for soldermask, legend etc.